CY7C340 - Multiple Array Matrix High-Density EPLDs

Product Overview

Cypress

Datasheet Details

Part number	CY7C340
Manufacturer	Cypress
File Size	84.35 KB
Description	Multiple Array Matrix High-Density EPLDs
Datasheet	CY7C340 Datasheet
Additional preview pages of the CY7C340 datasheet.

Product details

Description

The Cypress Multiple Array Matrix (MAX®) family of EPLDs provides a user-configurable, high-density solution to general-purpose logic integration requirements.

Features

Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions.
0.8-micron double-metal CMOS EPROM technology (CY7C34X).
Advanced 0.65-micron CMOS technology to increase performance (CY7C34XB).
Multiple Array MatriX architecture optimized for speed, density, and straightforward design implementation.
Programmable Interconnect Array (PIA) simplifies routing.
Flexible macrocells increase utilization.

📁 Similar Datasheet

CY7C341B - 192-Macrocell MAX EPLD (Cypress Semiconductor)
CY7C344 - 32-Macrocell MAX EPLD (Cypress Semiconductor)
CY7C344B - 32-Macrocell MAX EPLD (Cypress Semiconductor)
CY7C346 - USE ULTRA37000TM FOR ALL NEW DESIGNS(128-Macrocell MAX EPLD) (Cypress Semiconductor)
CY7C331 - Asynchronous Registered EPLD (Cypress Semiconductor)
CY7C335 - Universal Synchronous EPLD (Cypress Semiconductor)
CY7C371 - 32-Macrocell Flash CPLD (Cypress Semiconductor)
CY7C371I - UltraLogic 32-Macrocell Flash CPLD (Cypress Semiconductor)

Other Datasheets by Cypress

CY7C342 - 128-Macrocell MAX EPLDs
CY7C342B - 128-Macrocell MAX EPLDs
CY7C343 - 64-Macrocell MAX EPLD
CY7C343B - 64-Macrocell MAX EPLD
CY7C345 - 128-Macrocell MAX EPLDs
CY7C325 - Timing Control Unit

Published: Oct 15, 2017 |