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CY7C342B Datasheet 128-macrocell Max Eplds

Manufacturer: Cypress (now Infineon)

Overview: fax id: 61071CY7C342B CY7C342B.

General Description

The CY7C342B is an Erasable Programmable Logic Device (EPLD) in which CMOS EPROM cells are used to configure logic functions within the device.

The MAX architecture is 100% user configurable, allowing the devices to acmodate a variety of independent logic functions.

Logic Block Diagram 1 (B6) INPUT/CLK 2 (A6) INPUT 32 (L4) INPUT 34 (L5) INPUT 128-Macrocell MAX® EPLDs The 128 macrocells in the CY7C342B are divided into 8 Logic Array Blocks (LABs), 16 per LAB.

Key Features

  • 128 macrocells in 8 LABs.
  • 8 dedicated inputs, 52 bidirectional I/O pins.
  • Programmable interconnect array.
  • Advanced 0.65-micron CMOS technology to increase performance.
  • Available in 68-pin HLCC, PLCC, and PGA Functional.

More Datasheets from Cypress (now Infineon)

Part Number Description
CY7C342 128-Macrocell MAX EPLDs
CY7C340 Multiple Array Matrix High-Density EPLDs
CY7C343 64-Macrocell MAX EPLD
CY7C343B 64-Macrocell MAX EPLD
CY7C345 128-Macrocell MAX EPLDs
CY7C325 Timing Control Unit
CY7C008 64K/128K x 8/9 Dual-Port Static RAM
CY7C008V 3.3V 64K/128K x 8/9 Dual-Port Static RAM
CY7C009 64K/128K x 8/9 Dual-Port Static RAM
CY7C009V 128K x 8 Dual-Port Static RAM

CY7C342B Distributor