EMP38K03HPC - Dual N-Channel Logic Level Enhancement Mode Field Effect Transistor

Description

Q1 Q2 BVDSS 30V 30V RDSON (MAX.)@VGS=10V RDSON (MAX.)@VGS=4.5V ID @TC=25℃ 7.0mΩ 9.4mΩ 41A 4.0mΩ 5.4mΩ 60A ID @TA=25℃ 16A 21A Dual N Channel MOSFET UIS, Rg 100% Tested RoHS & Halogen Free & TSCA Compliant ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST

Excelliance MOS

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Datasheet Details

Part number	EMP38K03HPC
Manufacturer	Excelliance MOS
File Size	551.46 KB
Description	Dual N-Channel Logic Level Enhancement Mode Field Effect Transistor
Datasheet	EMP38K03HPC Datasheet
Additional preview pages of the EMP38K03HPC datasheet.

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Full PDF Text Transcription

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EMP38K03HPC Dual N-Channel Logic Level Enhancement Mode Field Effect Transistor ▪Product Summary: ▪ Pin Description: Q1 Q2 BVDSS 30V 30V RDSON (MAX.)@VGS=10V RDSON (MAX.)@VGS=4.5V ID @TC=25℃ 7.0mΩ 9.4mΩ 41A 4.0mΩ 5.4mΩ 60A ID @TA=25℃ 16A 21A Dual N Channel MOSFET UIS, Rg 100% Tested RoHS & Halogen Free & TSCA Compliant ▪ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS Q1 Q2 UNIT Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current1 Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 TC = 25 °C TC = 100 °C TA = 25 °C TA = 70 °C L = 0.1mH L = 0.05mH VGS ±20 ±20 V ID 41 60 26 38 ID 16 21 A 12 17 IDM 68 102 IAS 34 53 EAS 57.8 140.

Published: Jun 19, 2024 |