FDC6304P Datasheet | Fairchild Semiconductor

July 1997 FDC6304P Digital FET, Dual P-Channel General Description These P-Channel enhancement mode field effect transistor are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on-state resistance at low gate drive conditions. This device is designed especially for application in battery power applications such as notebook puters and cellular phones. This device has excellent on-state resistance even at gate drive voltages as low as 2.5 volts. Features -25 V, -0.46 A continuous, -1.0 A Peak. RDS(ON) = 1.5 Ω @ VGS= -2.7 V RDS(ON) = 1.1 Ω @ VGS = -4.5 V. Very low level gate drive requirements allowing...