FPD1500P100 Datasheet | Filtronic

FEATURES - 29.5 d Bm Linear Output Power - 18 d B Power Gain at 2 GHz - 10.5 d B Maximum Stable Gain at 10 GHz - 39 d Bm Output IP3 - 45% Power-Added Efficiency at 2 GHz - DESCRIPTION AND APPLICATIONS The FPD1500P100 is a packaged Al Ga As/In Ga As pseudomorphic High Electron Mobility Transistor (PHEMT), featuring a 0.25 µm by 1500 µm Schottky barrier gate, defined by highresolution stepper-based photolithography. The recessed and offset Gate structure minimizes parasitics to optimize performance. The epitaxial structure and processing have been optimized for reliable high-power applications. The FPD1500P100 also features Si3N4 passivation and is also available in die form and in the low cost plastic SOT89 and DFN plastic packages. Typical applications include mercial and other narrowband and broadband high-performance amplifiers, including SAT uplink transmitters, PCS/Cellular low-voltage high-efficiency output amplifiers, and medium-haul digital radio transmitters. - ELECTRICAL SPECIFICATIONS AT 22°C Parameter Power at 1d B Gain pression Power Gain at P1d B Maximum Stable Gain (S21/S12) Symbol P1d B G1d B SSG Test Conditions VDS = 8 V; IDS = 50% IDSS VDS = 8 V; IDS = 50% IDSS VDS = 8 V; IDS = 50% IDSS f = 2 GHz f = 10 GHz Power-Added Efficiency Output Third-Order Intercept Point (from 15 to 5 d B below P1d B) Saturated Drain-Source Current Maximum Drain-Source Current Transconductance Gate-Source Leakage Current Pinch-Off Voltage Gate-Drain Breakdown Voltage Thermal Resistivity (see Notes) IDSS IMAX GM IGSO |VP| |VBDGD| θJC PAE IP3 VDS = 8 V; IDS = 50% IDSS; POUT = P1d B VDS = 8V; IDS = 50% IDSS Matched for optimal power VDS = 1.3 V; VGS = 0 V VDS = 1.3 V; VGS ≅ +1 V VDS = 1.3 V; VGS = 0 V VGS = -5 V VDS = 1.3 V; IDS = 1.5 m A IGD = 1.5 m A VDS > 6V 0.7 14.5 375 39 465 750 400 1 1.0 16.0 48 15 1.3 550 d Bm m A m A m S µA V V °C/W 21.5 9.5 22.0 10.5 45 d B d B % Min 28.0 17.5 Typ 29.5 18.0 Max Units d Bm d B UNLESS OTHERWISE NOTED, RF SPECIFICATIONS MEASURED AT f = 2 GHz...