HY57V281620ET - Synchronous DRAM Memory 128Mbit (8M x 16bit)

This page provides the datasheet information for the HY57V281620ET, a member of the HY57V281620ELT Synchronous DRAM Memory 128Mbit (8M x 16bit) family.

Product Overview

Hynix Semiconductor

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Datasheet Details

Part number	HY57V281620ET
Manufacturer	Hynix Semiconductor
File Size	120.33 KB
Description	Synchronous DRAM Memory 128Mbit (8M x 16bit)
Datasheet	HY57V281620ET Datasheet
Additional preview pages of the HY57V281620ET datasheet.

HY57V281620ET Product details

Description

and is subject to change without notice.

responsibility for use of circuits described.

No patent licenses are implied.

Features

Voltage: VDD, VDDQ 3.3V supply voltage.
4096 Refresh cycles / 64ms.
All device pins are compatible with LVTTL interface.
Programmable Burst Length and Burst Type.
54 Pin TSOPII (Lead or Lead Free Package) - 1, 2, 4, 8 or full page for Sequential Burst.
All inputs and outputs referenced to positive edge of system clock.
Data mask function by UDQM, LDQM.
Internal four banks operation.
Auto refresh and self refre.

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Other Datasheets by Hynix Semiconductor

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Published: Nov 14, 2018 |