HY5DU281622T - 2nd 128M DDR SDRAM

This page provides the datasheet information for the HY5DU281622T, a member of the HY5DU28422T 2nd 128M DDR SDRAM family.

Product Overview

Hynix Semiconductor

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Datasheet Details

Part number	HY5DU281622T
Manufacturer	Hynix Semiconductor
File Size	1.54 MB
Description	2nd 128M DDR SDRAM
Datasheet	HY5DU281622T Datasheet
Additional preview pages of the HY5DU281622T datasheet.

HY5DU281622T Product details

Description

and is subject to change without notice.

128M DDR SDRAM Brief Information --------------------------------------------------------------------- 3 1.1 Description 1.2 Feature 1.3 Ordering Information 2.

Features

VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS) x16 device has two bytewide data strobes (UDQS, LDQS) per each x8 I/O Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ) On chip DLL ali.

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Published: Aug 4, 2014 |