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9FGL06 Datasheet

6-output 3.3v Pcie Clock Generator

Manufacturer: IDT

Datasheet Details

Part number 9FGL06
Manufacturer IDT
File Size 319.76 KB
Description 6-output 3.3V PCIe Clock Generator
Datasheet 9FGL06-IDT.pdf

9FGL06 Overview

The 9FGL06 devices are 3.3V members of IDT's 3.3V Full-Featured PCIe family. The devices have 6 output enables for clock management and support 2 different spread spectrum levels in addition to spread off. The 9FGL06 supports PCIe Gen1-4 mon Clocked architectures (CC) and PCIe Separate Reference no-Spread (SRnS) and Separate Reference Independent Spread (SRIS) clocking architectures.

9FGL06 Key Features

  • 100 MHz Low-Power HCSL (LP-HCSL) DIF pairs
  • 9FGL0641 default ZOUT = 100
  • 9FGL0651 default ZOUT = 85
  • 9FGL06P1 factory programmable defaults
  • 3.3V LVCMOS REF output w/Wake-On-LAN (WOL)
  • Easy AC-coupling to other logic families, see IDT
  • PCIe Gen1-2-3-4 CC-pliant
  • PCIe Gen2-3 SRIS-pliant
  • DIF cycle-to-cycle jitter <50ps
  • DIF output-to-output skew <50ps

9FGL06 Distributor