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9FGL08 - 8-output 3.3V PCIe Clock Generator

General Description

The 9FGL08 devices are 3.3V members of IDT's 3.3V Full-Featured PCIe family.

The devices have 8 output enables for clock management and support 2 different spread spectrum levels in addition to spread off.

Key Features

  • 8.
  • 100 MHz Low-Power HCSL (LP-HCSL) DIF pairs.
  • 9FGL0841 default ZOUT = 100.
  • 9FGL0851 default ZOUT = 85.
  • 9FGL08P1 factory programmable defaults.
  • 1 - 3.3V LVCMOS REF output w/Wake-On-LAN (WOL) support.
  • Easy AC-coupling to other logic families, see IDT.

📥 Download Datasheet

Datasheet Details

Part number 9FGL08
Manufacturer IDT
File Size 390.48 KB
Description 8-output 3.3V PCIe Clock Generator
Datasheet download datasheet 9FGL08 Datasheet

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9FGL0851 3.3V PCIe Gen1-5 Clock Generator Renesas
9FGL0851D 3.3V PCIe Gen1-6 Clock Generator Renesas

Other Datasheets by IDT

Part Number Description
9FGL0841 8-Output 3.3V PCIe Clock Generator
9FGL0851 8-Output 3.3V PCIe Clock Generator
9FGL02 2-output 3.3V PCIe Clock Generator
9FGL0241 2-Output 3.3V PCIe Clock Generator
9FGL0251 2-Output 3.3V PCIe Clock Generator
9FGL04 4-output 3.3V PCIe Clock Generator
9FGL0441 4-Output 3.3V PCIe Clock Generator
9FGL0451 4-Output 3.3V PCIe Clock Generator
9FGL06 6-output 3.3V PCIe Clock Generator
9FGL0641 6-Output 3.3V PCIe Clock Generator

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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8-output 3.3V PCIe Clock Generator 9FGL08 Description The 9FGL08 devices are 3.3V members of IDT's 3.3V Full-Featured PCIe family. The devices have 8 output enables for clock management and support 2 different spread spectrum levels in addition to spread off. The 9FGL08 supports PCIe Gen1-4 Common Clocked architectures (CC) and PCIe Separate Reference no-Spread (SRnS) and Separate Reference Independent Spread (SRIS) clocking architectures. The 9FGL08P1 can be programmed with a user-defined power up default SMBus configuration.