Datasheet4U Logo Datasheet4U.com

ICS8305 - LOW SKEW / 1-TO-4 / MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER

General Description

The ICS8305 is a low skew, 1-to-4, Differential/ LVCMOS-to-LVCMOS/LVTTL Fanout Buffer and a HiPerClockS™ member of the HiPerClockS™ family of High Performance Clock Solutions from ICS.

The ICS8305 has selectable clock inputs that accept either differential or single ended input levels.

Key Features

  • 4 LVCMOS/LVTTL outputs.
  • Selectable differential or LVCMOS/LVTTL clock inputs.
  • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL.
  • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL.
  • Maximum output frequency: 350MHz.
  • Output skew: 35ps (maximum).
  • Part-to-part skew: 700ps (maximum).
  • Additive phase jitter, RMS: 0.04ps (typical).
  • 3.3V core, 3.3V, 2.5V or 1.8V ou.

📥 Download Datasheet

Datasheet Details

Part number ICS8305
Manufacturer Integrated Circuit Systems
File Size 213.46 KB
Description LOW SKEW / 1-TO-4 / MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER
Datasheet download datasheet ICS8305 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Integrated Circuit Systems, Inc. ICS8305 LOW SKEW, 1-TO-4, MULTIPLEXED DIFFERENTIAL/ LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER FEATURES • 4 LVCMOS/LVTTL outputs • Selectable differential or LVCMOS/LVTTL clock inputs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL • Maximum output frequency: 350MHz • Output skew: 35ps (maximum) • Part-to-part skew: 700ps (maximum) • Additive phase jitter, RMS: 0.04ps (typical) • 3.3V core, 3.3V, 2.5V or 1.