QS5930T Description
The QS5930T Clock Driver uses an internal phase locked loop (PLL) to lock low skew outputs to a reference clock input. Six outputs are available: Careful layout and design ensure < 250ps skew between the Q0 Q4, and Q/2 outputs.
QS5930T Key Features
- 5V operation Q/2 output, 5 Q outputs Useful for Pentium, PowerPC, and PCI systems Internal loop filter RC network Low no