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QS5930T Datasheet Low Skew CMOS Pll Clock Driver

Manufacturer: Integrated Device Technology

Overview: .DataSheet.co.kr QS5930T LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER INDUSTRIAL TEMPERATURE RANGE LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP.

General Description

The QS5930T Clock Driver uses an internal phase locked loop (PLL) to lock low skew outputs to a reference clock input.

Six outputs are available: Q0–Q4, Q/2.

Careful layout and design ensure < 250ps skew between the Q0–Q4, and Q/2 outputs.

Key Features

  • 5V operation Q/2 output, 5 Q outputs Useful for Pentium, PowerPC, and PCI systems Internal loop filter RC network Low noise TTL level outputs 2000V Latch up > -30.

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