GAL26CV12 Overview
The GAL26CV12, at 7.5 ns maximum propagation delay time, bines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance 28-pin PLD available on the market. E2 technology offers high speed (<100ms) erase times, providing the ability to reprogram or reconfigure the device quickly and efficiently. Expanding upon the industry standard 22V10 architecture,...
GAL26CV12 Key Features
- HIGH PERFORMANCE E2CMOS® TECHNOLOGY
- 7.5 ns Maximum Propagation Delay
- Fmax = 142.8 MHz
- 4.5ns Maximum from Clock Input to Data Output
- TTL patible 16 mA Outputs
- UltraMOS® Advanced CMOS Technology
- ACTIVE PULL-UPS ON ALL PINS
- LOW POWER CMOS
- 90 mA Typical Icc
- E2 CELL TECHNOLOGY