MX25LM25645G Datasheet | Macronix

Features - Protocol Support - Single I/O and Octa I/O - Supports DTR (Double Transfer Rate) Mode - Supports clock frequencies up to 133MHz Macronix Proprietary Rev. 1.1, July 31, 2020 3V 256M-BIT [x 1/x 8] CMOS octaflash Memory 1. FEATURES GENERAL - Supports Serial Peripheral Interface -- Mode 0 - Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program operations - 268,435,456 x 1 bit structure or 33,554,432 x 8 bits (Octa I/O mode) structure - Protocol Support - Single I/O and Octa I/O - Supports DTR (Double Transfer Rate) Mode - Fast frequency support - Supports clock frequencies up to - Single I/O mode: 133MHz - Octa I/O mode: 133MHz - Configurable dummy cycle number for OPI read operation - Octa Peripheral Interface (OPI) available - Equal Sectors with 4K byte each, or Equal Blocks with 64K byte each - Any Block can be erased individually - Programming : - 256byte page buffer - Octa Input/Output page program to enhance program performance - Typical 100,000 erase/program cycles - 20 years data retention SOFTWARE FEATURES - Input Data Format - SPI: 1-byte mand code - OPI: 2-byte mand code - Advanced Security Features - Block lock protection The BP0-BP3 and T/B status bits define the size of the area to be protected against program and erase instructions - Advanced Sector Protection (Solid and Password Protect) - Additional 8K bit Secure OTP - Features unique identifier - Factory locked identifiable, and customer...