Download SY100S336 Datasheet PDF
SY100S336 page 2
Page 2
SY100S336 page 3
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SY100S336 Description

shift frequency of 700MHz s Clock to Q delay max. of 170mA s Internal 75KΩ input pull-down resistors s Industry standard 100K ECL levels s Extended supply voltage option: Three Select inputs (Sn) are provided for determining the mode of operation.

SY100S336 Key Features

  • S2 MR VEES VCCA P0
  • P3 D3 TC Q0