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SY100S351 - Hex D Flip-flop

Description

Max.

Clock to Q max.

IEE min.

98mA Industry standard 100K ECL levels Extended supply voltage option: VEE = 4.2V to 5.5V Voltage and temperature compensation for improved noise immunity Inter

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Datasheet Details

Part number SY100S351
Manufacturer Micrel Semiconductor
File Size 382.21 KB
Description Hex D Flip-flop
Datasheet download datasheet SY100S351 Datasheet

Full PDF Text Transcription

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Micrel, Inc. NOT RECOMMENDED FOR NEW DESIGNS HEX D FLIP-FLOP SY100S351 SY100S351 FEATURES DESCRIPTION ■ Max. toggle frequency of 700MHz ■ Clock to Q max. of 1200ps ■ IEE min. of –98mA ■ Industry standard 100K ECL levels ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity ■ Internal 75kΩ input pull-down resistors ■ 50% faster than Fairchild 300K ■ Better than 20% lower power than Fairchild ■ Function and pinout compatible with Fairchild F100K ■ Available in 28-pin PLCC package The SY100S351 offers six D-type, edge-triggered, master/ slave flip-flops with differential outputs, and is designed for use in high-performance ECL systems.
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