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74AUP2G32 - Low-power Dual 2-input OR Gate

General Description

The 74AUP2G32 provides dual 2-input OR function.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

Key Features

  • Wide supply voltage range from 0.8 V to 3.6 V.
  • High noise immunity.
  • Complies with JEDEC standards:.
  • JESD8-12 (0.8 V to 1.3 V).
  • JESD8-11 (0.9 V to 1.65 V).
  • JESD8-7 (1.2 V to 1.95 V).
  • JESD8-5 (1.8 V to 2.7 V).
  • JESD8-B (2.7 V to 3.6 V).
  • ESD protection:.
  • HBM JESD22-A114F Class 3A exceeds 5 000 V.
  • MM JESD22-A115-A e.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74AUP2G32 Low-power dual 2-input OR gate Rev. 7 — 23 January 2013 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down. 2. Features and benefits  Wide supply voltage range from 0.8 V to 3.6 V  High noise immunity  Complies with JEDEC standards:  JESD8-12 (0.8 V to 1.3 V)  JESD8-11 (0.