BS107 Datasheet | NXP Semiconductors

DISCRETE SEMICONDUCTORS DATA SHEET BS107 N-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor Features - Direct interface to C-MOS, TTL, etc. - High-speed switching - No secondary breakdown. DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a TO-92 variant envelope. Intended for use as a line current interruptor in telephone sets and for applications in relay, high-speed and line transformer drivers. PINNING - TO-92 variant PIN 1 2 3 gate drain DESCRIPTION source Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL VDS VGSth ID RDSon PARAMETER drain-source voltage (DC) gate-source threshold voltage drain current (DC) drain-source on-state resistance MAX. 200 2.4 150 28 UNIT V V m A Ω handbook, halfpage d 1 2 3 g MAM146 s April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134). SYMBOL VDS ±VGSO ID IDM Ptot Tstg Tj PARAMETER drain-source voltage gate-source voltage drain current drain current total power dissipation storage temperature range operating junction temperature open drain DC peak up to Tamb = 25 °C CONDITIONS - - - - - - 65 - MIN. 20 150 300 830 150 150 MAX. 200 UNIT V V m A m A m W °C °C THERMAL RESISTANCE SYMBOL Rth j-a from junction to ambient PARAMETER MAX. 150 UNIT K/W April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS...