BS107A Datasheet | NXP Semiconductors

DISCRETE SEMICONDUCTORS DATA SHEET BS107A N-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor Features - Direct interface to C-MOS, TTL, etc. - High-speed switching - No second breakdown DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in TO-92 envelope and designed for use as line current interrupter in telephone sets and for application in relay, high-speed and line-transformer drivers. PINNING - TO-92 1 2 3 = = = source gate drain QUICK REFERENCE DATA Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Total power dissipation up to Tcase = 25 °C Drain-source ON-resistance ID = 250 m A; VGS = 10 V Transfer admittance ID = 250 m A; VGS = 25 V  Yfs RDS(on) VDS ± VGSO ID Ptot BS107A max. max. max. max. typ. max. 200 V 20 V 250 m A 0.6 W 4.5 Ω 6.4 Ω 200 m S 350 m S min. typ. PIN CONFIGURATION handbook, 2 columns handbook, halfpage d 2 3 g MSB033 MBB076 - 1 s Note: Various pinnings are available. Fig.1 Simplified outline and symbol. April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Drain-source voltage Gate-source voltage (open drain) Drain current (DC) Drain current (peak) Total power dissipation up to Tcase = 25 °C Storage temperature Junction temperature THERMAL RESISTANCE From junction to ambient (note 1) Note 1. Transistor mounted on printed circuit board, max. lead length 4 mm, mounting pad for collector lead min. 10 mm × 10 mm. Rth j-a = VDS ± VGSO ID IDM Ptot Tstg Tj max. max. max. max. max. max. 200 V 20 V 250 m A 500 m A 0.6 W 150 °C - 55 to +150 °C 125 K/W April 1995 Philips...