NB3N51034 - Quad HCSL - LVDS Clock Generator

Product Overview

ON Semiconductor

Datasheet Details

Part number	NB3N51034
Manufacturer	ON Semiconductor
File Size	434.55 KB
Description	Quad HCSL - LVDS Clock Generator
Datasheet	NB3N51034 Datasheet
Additional preview pages of the NB3N51034 datasheet.

Product details

Description

Pin Symbol I/O 1 VDDXD Power 2 S0 Input 3 S1 Input 4 S2 Input 5 X1/CLK 6 X2 7 PD Input Output Input 8 OE Input 9 GNDXD 10 IREF 11 CLK3 12 CLK3 13 CLK2 14 CLK2 15 VDDODA 16 GNDODA 17 CLK1 18 CLK1 19 CLK0 20 CLK0 Power Output HCSL or LVDS Output HCSL or LVDS Output HCSL or LVDS Output HCSL or LVDS Output Power Power HCSL or LVDS Output HCSL or LVDS Output HCSL or LVDS Output HCSL or LVDS Output Figure 2. Pin Configuration (Top View) Description Connect to a +3.3 V source.LVTTL/LV

Features

Uses 25 MHz Fundamental Mode Parallel Resonant Crystal.
Power Down Mode.
4 Low Skew HCSL or LVDS Outputs TSSOP.
20 DT SUFFIX CASE 948E NB3N 1034 ALYWG G.
OE Tri.
States Outputs.
Spread of.
0.5%,.
1.0%,.
1.5% and No Spread.
PCIe Gen 1, Gen 2, Gen 3, Gen 4 Compliant.
Phase Noise (SS OFF) @ 100 MHz: Offset Noise Power A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb.
Fre.

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Published: May 14, 2014 |