NBSG86A Description
Pin BGA C2 C1 QFN 1 2 Name OLS (Note 3) SEL I/O Input ECL, CML, LVCMOS, LVDS, LVTTL Input ECL, CML, LVCMOS, LVDS, LVTTL Input − − ECL, CML, LVCMOS, LVDS, LVTTL Input ECL, CML, LVCMOS, LVDS, LVTTL Input − − RSECL Output RSECL Output − − ECL, CML, LVCMOS, LVDS, LVTTL Input ECL, CML, LVCMOS, LVDS, LVTTL Input − − Figure 2. QFN−16 Pinout (Top View) Description Input Pin for the Output Level Select (OLS). Inverted...
NBSG86A Key Features
- Maximum Input Clock Frequency > 8 GHz Typical
- Pb-Free Packages are Available
- Output Level Select
- Rev. 10
- ECL, CML, LVCMOS, LVDS, LVTTL Input ECL, CML, LVCMOS, LVDS, LVTTL Input
- RSECL Output RSECL Output
- ECL, CML, LVCMOS, LVDS, LVTTL Input ECL, CML, LVCMOS, LVDS, LVTTL Input