STP5950 Datasheet PDF

STANSON STP5950

STP5950 is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These device is particularly suited for low voltage application, notebook computer power management and other battery circuits where high-side switching.

Part No.	STP5950
Datasheet	STP5950 Download
Manufacturer	STANSON
Description	P-Channel Enhancement Mode MOSFET
Buy	Stock & Price

DESCRIPTION

PIN CONFIGURATION FEATURE l -100V/-15A, RDS(ON) = 36mΩ (Typ.) @VGS = -10V l -100V/-10A, RDS(ON) = 40mΩ @VGS = -4.5V l Super high density cell design for extremely low RDS(ON) l Exceptional on-resistance and maximum DC current capability l TO-220 package design ABSOULTE

MAXIMUM RATINGS

(Ta = 25℃ Unless otherwise noted ) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ=150℃) Pulsed Drain Current Power Dissipation TA=25℃ TA=80℃ TA=25℃ Operation Junction Temperature Storgae Temperature Range Thermal Resistance-Junction to Ambient Symbol VDSS VGSS ID IDM PD TJ TSTG RθJA Typical -100 ±20 -35.0 -33.0 -140 140 -55/150 -55/150 62 Unit V V A A W ℃ ℃ ℃/W STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2009, Stanson Corp. STP5950 2016 V1 STP5950 P Channel Enhancement Mode MOSFET -35.0A

ELECTRICAL CHARACTERISTICS

( Ta = 25℃ Unless otherwise noted ) Parameter Symbol Condition Min Typ Max Unit Static Drain-Source Breakdown Volt...