KM416S1021C Overview
The KM416S1021C is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be...
KM416S1021C Key Features
- JEDEC standard 3.3V power supply
- SSTL_3 (Class II) patible with multiplexed address
- Dual banks operation
- MRS cycle with address key programs
- CAS latency (2 & 3)
- Burst length (1, 2, 4, 8 & Full page)
- Burst type (Sequential & Interleave)
- All inputs are sampled at the positive going edge of the system clock
- Burst read single-bit write operation
- DQM for masking