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K4D263238D - 1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM

General Description

The K4D263238D is 134,217,728 bits of hyper synchronous data rate Dynamic RAM organized as 4 x 1,048,576 words by 32 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Key Features

  • 2.5V ± 5% power supply.
  • SSTL_2 compatible inputs/outputs.
  • 4 banks operation.
  • MRS cycle with address key programs -. Read latency 3,4 (clock) -. Burst length (2, 4, 8 and Full page) -. Burst type (sequential & interleave).
  • Full page burst length for sequential burst type only.
  • Start address of the full page burst should be even.
  • All inputs except data & DM are sampled at the positive going edge of the system clock.
  • Different.

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📁 Similar Datasheet

Part Number Description Manufacturer
K4D263238I-VC 128M-Bit GDDR SDRAM Samsung Electronics
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Other Datasheets by Samsung Semiconductor

Part Number Description
K4D263238A 1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM
K4D263238E 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM
K4D263238F 1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM
K4D263238G-GC 128Mbit GDDR SDRAM
K4D263238I-UC 128M GDDR SDRAM

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K4D263238D 128M DDR SDRAM 128Mbit DDR SDRAM 1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL Revision 1.3 July 2002 - 1 - Rev. 1.3 (Jul. 2002) K4D263238D Revision History Revision 1.3 (July 18, 2002) • Changed power dissipation from 2.0W to 1.8W 128M DDR SDRAM Revision 1.2 (June 17, 2002) • Removed K4D263238D-QC55 from the spec. • 183/166MHz were supported in K4D263238D-QC50. Revision 1.1 (May 24, 2002) • Removed K4D263238D-QC45/60 from the spec Revision 1.0 (May 20, 2002) • Define DC spec. Revision 0.0 (April 23, 2002)- Target spec • Define target spec. - 2 - Rev. 1.3 (Jul. 2002) K4D263238D 128M DDR SDRAM 1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL FEATURES • 2.