DESCRIPTION
PIN CONFIGURATION SOT-23-3L 3 D G S 1 2 1.Gate 2.Source 3.Drain PART MARKING SOT-23-3L 3 18YW 1 2 Y: Year Code W: Week Code FEATURE 40V/3.9A, RDS(ON) = 56mΩ (Typ.) @VGS = 10V 40V/3.5A, RDS(ON) = 62mΩ @VGS = 4.5V 40V/2.0A, RDS(ON) = 95 mΩ @VGS = 2.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOT-23-3L package design STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA ST2318CMG 2009. V1 ST2318 N Channel Enhancement Mode MOSFET 3.9A ABSOULTE MAXIMUM RATINGS
(Ta = 25℃ Unless otherwise noted ) Parameter Symbol Typical Drain-Source Voltage VDSS 40 Gate-Source Voltage VGSS ±12 Continuous Drain CurrentTJ=150℃) TA=25℃ TA=70℃ ID 4.0 3.0 Pulsed Drain Current IDM 10 Continuous Source Current (Diode Conduction) IS Power Dissipation TA=25℃ TA=70℃ PD Operation Junction Temperature TJ 1.25 1.25 0.8 150 Storgae Temperature Range TSTG -55/150 Thermal Resistance-Junction to Ambient RθJA 100 Unit V V A A A W ℃ ℃ ℃/W STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA ST2318CMG 2009.