STP3052D Datasheet PDF | Stanson Technology

Stanson Technology STP3052D

STP3052D is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application.

Part No.	STP3052D
Datasheet	STP3052D Download
Manufacturer	Stanson Technology
Description	MOSFET
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DESCRIPTION

Such as DC/DC converter and Desktop computer power management. The package is universally preferred for commercial industrial surface mount applications. PIN CONFIGURATION (D-PAK) FEATURE TO-252 TO-251 -30V/-25.0A, RDS(ON) = 45mΩ (Typ.) @VGS = -10V -30V/-16.0A, RDS(ON) = 78mΩ @VGS =-5.0V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability TO-252,TO-251 package design PART MARKING Y: Year Code A: Process Code STANSON TECHNOLOGY 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2009, Stanson Corp. STP3052D 2009. V1 STP3052D P Channel Enhancement Mode MOSFET -25.0A ABSOULTE

MAXIMUM RATINGS

(Ta = 25℃ Unless otherwise noted ) Parameter Symbol Drain-Source Voltage VDSS Gate-Source Voltage Continuous Drain Current (TJ=150℃) Pulsed Drain Current TA=25℃ TA=70℃ VGSS ID IDM Continuous Source Current (Diode Conduction) Power Dissipation TA=25℃ TA=70℃ Operation Junction Temperature IS PD TJ Storgae Temperature Ra...