LP2997 Datasheet | Texas Instruments

FEATURES - 2 Source and Sink Current - Low Output Voltage Offset - No External Resistors Required - Linear Topology - Suspend to Ram (STR) Functionality - Low External ponent Count - Thermal Shutdown - Available in SOIC-8, SO Power PAD-8 Packages APPLICATIONS - DDR-II Termination Voltage - SSTL-18 Termination DESCRIPTION The LP2997 linear regulator is designed to meet the JEDEC SSTL-18 specifications for termination of DDR-II memory. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 500m A continuous current and transient peaks up to 900m A in the application as required for DDR-II SDRAM termination. The LP2997 also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs. An additional feature found on the LP2997 is an active low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. When SD is pulled low the VTT output will tri-state providing a high impedance output, but, VREF will remain active. A power savings advantage can be obtained in this mode through lower quiescent current. Typical Application Circuit SD AV IN = 2.5V VDDQ = 1.8V + CIN SD AVIN VREF V DDQ V SENSE PVIN + CREF VREF = 0.9V + C OUT V TT= 0.9V Figure 1. Typical Application Circuit Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004- 2013, Texas Instruments Incorporated SNVS295F - MAY 2004 -...