| Part Number | Description | Manufacture |
|---|---|---|
|
|
TRIPLE 3-INPUT AND GATE s an advanced high-speed CMOS TRIPLE 3-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal PIN CONNECTION AND IEC LOGIC SYMBOLS May 1997 1/7 74AC11 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 3, 9 2, 4, |
 STMicroelectronics |
|
|
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage D Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption D Balanced Propagation Delays D ±24-mA Output Drive Current – Fanout to 15 F Devices D SCR |
 Texas Instruments |
|
|
Dual JK Negative Edge-Triggered Flip-Flop individual J, K, Clock and asynchronous Set and Clear inputs to each flip-flop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may change when the clock is High and the bistable will |
 Hitachi Semiconductor |
|
|
Quad Buffer hnology. It is ideal for low power applications maintaining high speed operation similar to PIN CONNECTION AND IEC LOGIC SYMBOLS May 1997 1/8 74AC125 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 4, 10, 13 2, 5, 9, 12 3, 6, 8, 11 |
 Fairchild Semiconductor |
|
|
Triple 3-Input NAND Gate • Outputs Source/Sink 24 mA • ′ACT10 Has TTL Compatible Inputs • These are Pb−Free Devices VCC 14 13 12 11 10 9 8 1234567 GND Figure 1. Pinout: 14−Lead Packages Conductors (Top View) www.onsemi.com 14 1 MARKING DIAGRAMS 14 SOIC−14 D SUFFIX CA |
 ON Semiconductor |
|
|
Dual Retriggerable Resettable Multivibrator retriggerable capability, complementary dc level triggering and overriding Direct Clear. When a circuit is in the quasi-stable (delay) state, another trigger applied to the inputs (per the Truth Table) will cause the delay period to start again, with |
Hitachi Semiconductor |
|
|
TRIPLE 3-INPUT NAND GATE WITH 74 SERIES 10 IMPROVED LATCH-UP IMMUNITY B M (Plastic Package) (Micro Package) ORDER CODES : 74AC10B 74AC10M PIN CONNECTION AND IEC LOGIC SYMBOLS May 1997 1/7 74AC10 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 3, 9 2, 4, 1 |
STMicroelectronics |
|
|
Dual JK Positive Edge-Triggered Flip-Flop ■ ICC reduced by 50% ■ Outputs source/sink 24mA ■ ACT109 has TTL-compatible inputs tm General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of ris |
Fairchild Semiconductor |
|
|
3 TO 8 LINE DECODER INVERTING s ICC reduced by 50% s Outputs source/sink 24 mA s ACT125 has TTL-compatible outputs Ordering Code: Order Number 74AC125SC 74AC125SJ 74AC125MTC 74AC125PC 74ACT125SC 74ACT125SJ 74ACT125MTC 74ACT125PC Package Number M14A M14D MTC14 N14A M14A M14D MTC1 |
STMicroelectronics |
|
|
HEX INVERTER s ICC reduced by 50% s Multifunction capability s Two completely independent 1-of-4 decoders s Active LOW mutually exclusive outputs s Outputs source/sink 24 mA s ACT139 has TTL-compatible inputs Ordering Code: Order Number 74AC139SC 74AC139SJ 74AC1 |
STMicroelectronics |
| Total 344 results |
