C1410 Datasheet | Specifications & PDF Download

MC14106B Hex Schmitt Trigger The MC14106B hex Schmitt Trigger is constructed with MOS P−channel and N−channel enhancement mode devices in a single mo

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ADC1410S series Rev. 03 — 12 April 2010 www.DataSheet4U.com Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outp

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MC14106B Hex Schmitt Trigger The MC14106B hex Schmitt Trigger is constructed with MOS P−channel and N−channel enhancement mode devices in a single mo

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Hex Schmitt Trigger The MC14106B hex Schmitt Trigger is constructed with MOS P–channel and N–channel enhanceme

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www.DataSheet4U.com 1 TC1410 TC1410N 0.5A HIGH-SPEED MOSFET DRIVERS FEATURES s s s s s s s s s s Latch-Up Protected: Will Withstand 500mA Reverse Cur

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www.DataSheet4U.com C1410 PXO Typical Applications Base Stations Test Equipment Synthesizers Features AT-Cut Crystal Dual-inline oscillator Surfac

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LTC1410 12-Bit, 1.25Msps Sampling A/D Converter with Shutdown FEATURES s s s s s s DESCRIPTIO s s s s 1.25Msps Sample Rate Power Dissipation: 160mW

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ISDN S Interface Hybrid APC14103e ELECTRICAL SPECIFICATIONS @ 25°C OPERATING TEMPERATURE 0°C TO 70°C Choke Primary Inductance mH min 20 Leakage Induc

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CY7C1410AV18 CY7C1425AV18 CY7C1412AV18 CY7C1414AV18 36-Mbit QDR-II™ SRAM 2-Word Burst Architecture Features • Separate Independent Read and Write dat

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HFC high frequency ceramic capacitor www.DataSheet4U.com EU features • • • • • • • • Low dielectric loss at high frequency (high Q) Narrow tolerance

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CY7C1410JV18, CY7C1425JV18 CY7C1412JV18, CY7C1414JV18 36-Mbit QDR™-II SRAM 2-Word Burst Architecture Features ■ Configurations CY7C1410JV18 – 4M x 8

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Preliminary QR_1410T30 100 Amp/1400 Volts Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272 Fast Recovery Diode M

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PRELIMINARY CY7C1410V18 CY7C1425V18 CY7C1412V18 CY7C1414V18 36-Mbit QDR-II™ SRAM 2-Word Burst Architecture Features • Separate Independent Read and

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