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74HC595 8−Bit Serial−Input/Serial or Parallel−Output Shift Register with Latched 3−State Outputs High−Performance Silicon−Gate CMOS The 74HC595 consi

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TPA1861/TPA1862/TPA1864 40-V, 6-MHz, Zero-Drift Op Amps Features • Supply Voltage: 4.5 V to 40 V or ±2.25 V to ±20 v • Offset Voltage: ±30 μV Maximum

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TPA1861/TPA1862/TPA1864 40-V, 6-MHz, Zero-Drift Op Amps Features • Supply Voltage: 4.5 V to 40 V or ±2.25 V to ±20 v • Offset Voltage: ±30 μV Maximum

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TPA1861/TPA1862/TPA1864 40-V, 6-MHz, Zero-Drift Op Amps Features • Supply Voltage: 4.5 V to 40 V or ±2.25 V to ±20 v • Offset Voltage: ±30 μV Maximum

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TPA1881/TPA1882 40-V, 12-MHz, Zero-Drift Op Amps Features  Supply Voltage: 4.5 V to 40 V or ±2.25 V to ±20 V  Offset Voltage: ±15 μV Maximum  Diff

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TPA1881/TPA1882 40-V, 12-MHz, Zero-Drift Op Amps Features  Supply Voltage: 4.5 V to 40 V or ±2.25 V to ±20 V  Offset Voltage: ±15 μV Maximum  Diff

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74HC595 8-BIT SHIFT REGISTER WITH 8-BIT OUTPUT REGISTER Description The 74HC595 is an high speed CMOS device. An eight bit shift register accpets dat

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M54HC194 M74HC194 4 BIT PIPO SHIFT REGISTER . . . . . . . . HIGH SPEED tPD = 12 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community UCC28950 SLUSA16D – MARCH 2010 – REVISED NOVEMBER 2016 UCC28

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AHDSMMIa/1Ds4VmI4L2eevDedl aSiathaiftCeSroheneftidential Copyright Notice: Copyright © 2008-2009, ASMedia TECHNOLOGY INC. All Rights Reserved. INFORM

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74HC165; 74HCT165 8-bit parallel-in/serial out shift register Rev. 03 — 14 March 2008 Product data sheet 1. General description The 74HC165; 74HCT16

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SN54HC595, SN74HC595 SCLS041J – DECEMBER 1982 – REVISED OCTOBER 2021 SNx4HC595 8-Bit Shift Registers With 3-State Output Registers 1 Features • 8-bit

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SN5491A, SN54LS91, SN7491A, SN74LS91 8-BIT SHIFT REGISTERS SDLS126 – MARCH 1974 – REVISED MARCH 1988 PRODUCTION DATA information is current as of pub

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CD40100BMS December 1992 CMOS 32-Stage Static Left/Right Shift Register Description CD40100BMS is a 32-Stage shift register containing 32 D-type mast

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PRODUCT DATA SHEET STMP3770 Media System on Chip Fifth-Generation Audio/Video Decoder Version 1.04 March 14, 2008 STFM1000 Radio Host, Debug Peer-to-

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CD74HC595 SCHS353A – JANUARY 2004 – REVISED FEBRUARY 2022 CD74HC595 8-Bit Shift Registers With 3-State Output Registers 1 Features • 8-Bit serial-in,

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