CY2318ANZ Datasheet | Cypress

.. 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs Features - One input to 18 output buffer/driver - Supports up to four SDRAM DIMMs - Two additional outputs for feedback - Serial interface for individual output control - 150ps typical output-output skew - Up to 100 MHz operation - Dedicated OE pin for testing - Space-saving 48-pin SSOP package - 3.3V operation Functional Description The CY2318ANZ is a 3.3V buffer designed to distribute high-speed clocks in PC applications. The part has 18 outputs, 16 of which can be used to drive up to four SDRAM DIMMs, and the remaining can be used for external feedback to a PLL. The device operates at 3.3V and outputs can run up to 100 MHz, thus making it patible with Pentium II® processors. The CY2318ANZ can be used in conjunction with the CY2280, CY2281, CY2282 or similar clock synthesizer for a plete Pentium II motherboard solution. The CY2318ANZ also includes a serial interface which can enable or disable each output clock. On power-up, all output clocks are enabled (internal pull up). A separate Output Enable pin facilitates testing on ATE. Block Diagram Pin Configuration SSOP Top View BUF_IN SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDRAM9 SDRAM10 SDRAM11 SDRAM12 SDRAM13 SDRAM14 SDRAM15 SDRAM16 SDRAM17 OE SDATA Serial Interface Decoding SCLOCK NC NC VDD SDRAM0 SDRAM1 VSS VDD SDRAM2 SDRAM3 VSS BUF_IN VDD SDRAM4 SDRAM5 VSS VDD SDRAM6 SDRAM7 VSS VDD SDRAM16 VSS VDDIIC SDATA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC VDD SDRAM15 SDRAM14 VSS VDD SDRAM13 SDRAM12 VSS OE VDD SDRAM11 SDRAM10 VSS VDD SDRAM9 SDRAM8 VSS VDD SDRAM17 VSS VSSIIC SCLOCK Cypress Semiconductor Corporation Document #: 38-07181 Rev. - B - 3901 North First Street - San Jose, CA 95134 - 408-943-2600 Revised January 19, 2005 Data Sheet 4 U...