Datasheet4U Logo Datasheet4U.com

CY2303 - Phase-Aligned Clock Multiplier

Datasheet Summary

Description

The CY2303 is a 3 output 3.3 V phase-aligned system clock designed to distribute high-speed clocks in PC, workstation, datacom, telecom, and other high-performance applications.

The part allows user to obtain 1x, 2x, and 4x REFIN output frequencies on respective output pins.

Features

  • 3-Multiplier configuration (1x, 2x, 4x ref).
  • 10 MHz to 166.67 MHz operating range (reference input from 10 MHz to 41.67 MHz).
  • Phase alignment.
  • 80 ps typical period jitter.
  • Output enable pin.
  • 3.3 V operation.
  • 5 V tolerant input.
  • 8-pin 150-mil small-outline integrated circuit (SOIC) package.
  • Commercial temperature range Functional.

📥 Download Datasheet

Datasheet preview – CY2303

Datasheet Details

Part number CY2303
Manufacturer Cypress Semiconductor
File Size 318.90 KB
Description Phase-Aligned Clock Multiplier
Datasheet download datasheet CY2303 Datasheet
Additional preview pages of the CY2303 datasheet.

📁 Similar Datasheet

  • CY2304 - 3.3V Zero Delay Buffer (Cypress)
  • CY2304NZ - Four Output PCI-X and General Purpose Buffer (Cypress)
  • CY2305 - Low Cost 3.3 V Zero Delay Buffer (Cypress)
  • CY2308 - 3.3V Zero Delay Buffer (Cypress)
  • CY2309 - Low Cost 3.3 V Zero Delay Buffer (Cypress)
  • CY23EP05 - 5 Output Zero Delay Buffer (Cypress)
  • CY23EP09 - Nine-Output Zero Delay Buffer (Cypress)
  • CY23FP12 - 200MHz Field Programmable Zero Delay Buffer (Cypress)
  • CY23FS08 - 2.5V / 3.3V Zero Delay Buffer (Cypress)
  • CY23S02 - Frequency Multiplier and Zero Delay Buffer (Cypress)
Other Datasheets by Cypress Semiconductor
  • CY2300 - Phase-Aligned Clock Multiplier
  • CY2302 - Frequency Multiplier and Zero Delay Buffer
  • CY2305C - Zero Delay Buffers
  • CY2309C - Zero Delay Buffers
  • CY2313ANZ - 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs
  • CY2318ANZ - 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs
  • CY2318BNZ - 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs
  • CY23FS04 - 2.5V / 3.3V Zero Delay Buffer

Full PDF Text Transcription

Click to expand full text
CY2303 Phase-Aligned Clock Multiplier Phase-Aligned Clock Multiplier Features ■ 3-Multiplier configuration (1x, 2x, 4x ref) ■ 10 MHz to 166.67 MHz operating range (reference input from 10 MHz to 41.67 MHz) ■ Phase alignment ■ 80 ps typical period jitter ■ Output enable pin ■ 3.3 V operation ■ 5 V tolerant input ■ 8-pin 150-mil small-outline integrated circuit (SOIC) package ■ Commercial temperature range Functional Description The CY2303 is a 3 output 3.3 V phase-aligned system clock designed to distribute high-speed clocks in PC, workstation, datacom, telecom, and other high-performance applications. The part allows user to obtain 1x, 2x, and 4x REFIN output frequencies on respective output pins. The CY2303 has an on-chip PLL, which locks to an input clock presented on the REFIN pin.
Published: |