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CY2308 - 3.3V Zero Delay Buffer

Datasheet Summary

Description

The CY2308 is a 3.3 V Zero Delay Buffer designed to distribute high speed clocks in PC, workstation, datacom, telecom, and other high performance applications.

The part has an on-chip PLL that locks to an input clock presented on the REF pin.

Features

  • Zero input-output propagation delay, adjustable by capacitive load on FBK input.
  • Multiple configurations, see Available CY2308 Configurations on page 4 for more details.
  • Multiple low skew outputs.
  • Two banks of four outputs, three-stateable by two select inputs.
  • 10 MHz to 133 MHz operating range.
  • 75 ps typical cycle-to-cycle jitter (15 pF, 66 MHz).
  • Space saving 16-pin 150 mil SOIC package or 16-pin TSSOP.
  • 3.3 V operation.
  • Industrial temperature availa.

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Datasheet preview – CY2308

Datasheet Details

Part number CY2308
Manufacturer Cypress
File Size 424.48 KB
Description 3.3V Zero Delay Buffer
Datasheet download datasheet CY2308 Datasheet
Additional preview pages of the CY2308 datasheet.

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Full PDF Text Transcription

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CY2308 3.3 V Zero Delay Buffer 3.3 V Zero Delay Buffer Features ■ Zero input-output propagation delay, adjustable by capacitive load on FBK input ■ Multiple configurations, see Available CY2308 Configurations on page 4 for more details ■ Multiple low skew outputs ■ Two banks of four outputs, three-stateable by two select inputs ■ 10 MHz to 133 MHz operating range ■ 75 ps typical cycle-to-cycle jitter (15 pF, 66 MHz) ■ Space saving 16-pin 150 mil SOIC package or 16-pin TSSOP ■ 3.3 V operation ■ Industrial temperature available Functional Description The CY2308 is a 3.3 V Zero Delay Buffer designed to distribute high speed clocks in PC, workstation, datacom, telecom, and other high performance applications. The part has an on-chip PLL that locks to an input clock presented on the REF pin.
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