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MTEA6C15J4 Datasheet Preview

MTEA6C15J4 Datasheet

N & P-Channel Enhancement Mode Power MOSFET

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CYStech Electronics Corp.
Spec. No. : C938J4
Issued Date : 2013.12.04
Revised Date : 2013.12.30
Page No. : 1/13
N & P-Channel Enhancement Mode Power MOSFET
MTEA6C15J4
BVDSS
ID @VGS=10V(-10V)
Features
Low gate charge
Simple drive requirement
ESD protected
Pb-free lead plating and halogen-free package
RDSON(TYP)@VGS=10V(-10V)
RDSON(TYP)@VGS=6V(-6V)
N-CH
150V
9.3A
163mΩ
177mΩ
P-CH
-150V
-7.1A
283mΩ
308Ω
Equivalent Circuit
MTEA6C15J4
Outline
TO-252-4L
GGate DDrain SSource
Absolute Maximum Ratings (TA=25°C, unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ TC=25°C, VGS=10V(-10V)
Continuous Drain Current @ TC=100°C, VGS=10V(-10V)
Continuous Drain Current @ TA=25°C, VGS=10V(-10V)
Continuous Drain Current @ TA=70°C, VGS=10V(-10V)
Pulsed Drain Current *1
Total Power Dissipation (TC=25)
Total Power Dissipation (TC=100)
Total Power Dissipation (TA=25)
Total Power Dissipation (TA=70)
Operating Junction and Storage Temperature Range
Note : *1. Pulse width limited by maximum junction temperature
*2. Duty cycle 1%
(Note1)
(Note1)
(Note2)
(Note2)
(Note3)
(Note1)
(Note1)
(Note2)
(Note2)
Symbol
Limits
N-channel P-channel
VDS 150
-150
VGS ±20
±20
ID
9.3
6.6
-7.1
-5.0
IDSM
2
1.7
-1.5
-1.3
IDM 20
-20
PD
37.5
18.7
PDSM
2.4
1.7
Tj, Tstg
-55~+175
Unit
V
A
W
°C
MTEA6C15J4
CYStek Product Specification




Cystech Electonics

MTEA6C15J4 Datasheet Preview

MTEA6C15J4 Datasheet

N & P-Channel Enhancement Mode Power MOSFET

No Preview Available !

CYStech Electronics Corp.
Spec. No. : C938J4
Issued Date : 2013.12.04
Revised Date : 2013.12.30
Page No. : 2/13
Thermal Data
Parameter
Symbol
Value
Unit
Thermal Resistance, Junction-to-case, max
Rth,j-c
4
Thermal Resistance, Junction-to-ambient, max (Note2)
Thermal Resistance, Junction-to-ambient, max (Note4)
Rth,j-a
62.5 °C/W
90
Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful
in setting the upper dissipation limit for cases where additional heatsinking is used.
2. The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air
environment with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction
temperature of 150°C. The value in any given application depends on the user’s specific board design.
3. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency
and low duty cycles to keep initial TJ=25°C.
4. When mounted on the minimum pad size recommended (PCB mount), t10s.
N-CH Characteristics (Tc=25°C, unless otherwise specified)
Symbol
Min. Typ. Max. Unit Test Conditions
Static
BVDSS
VGS(th)
150
2.0
-
3.2
-
4.0
V
VGS=0V, ID=250μA
VDS =VGS, ID=250μA
GFS *1
-
5
- S VDS =10V, ID=2.5A
IGSS - - ±10
VGS=±20V, VDS=0V
IDSS
- - 1 μA VDS =120V, VGS =0V
- - 25
VDS =120V, VGS =0V, Tj=125°C
RDS(ON) *1
-
-
163
177
225
235
mΩ
VGS =10V, ID=2.5A
VGS =6V, ID=2A
Dynamic
Qg *1
Qgs *1
Qgd *1
td(ON) *1
tr *1
td(OFF) *1
tf *1
Ciss
Coss
Crss
- 8.5 -
- 1.8 - nC ID=2.5A, VDS=120V, VGS=10V
- 2.9 -
-7-
-
-
5
18
-
-
ns VDS=75V, ID=1A, VGS=10V, RG=6Ω
-7-
- 346 -
- 44 - pF VGS=0V, VDS=25V, f=1MHz
- 14 -
Source-Drain Diode
IS *1
ISM *2
VSD *1
trr *1
Qrr *1
-
-
-
-
-
-
-
2.3
9.2
A
0.79 1.3
V IS=3A, VGS=0V
90
150
-
-
ns
nC
IF=3A, VGS=0V, dIF/dt=100A/μs
Note : *1.Pulse Test : Pulse Width 300μs, Duty Cycle2%
*2.Pulse width limited by maximum junction temperature.
MTEA6C15J4
CYStek Product Specification


Part Number MTEA6C15J4
Description N & P-Channel Enhancement Mode Power MOSFET
Maker Cystech Electonics
Total Page 13 Pages
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