HY5DU281622AT-6 Datasheet PDF - Hynix Semiconductor 128M(8Mx16) DDR SDRAM Specs

HY5DU281622AT-6 - 128M(8Mx16) DDR SDRAM

Datasheet Summary

Description

and is subject to change without notice.

Hynix semiconductor does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Features

VDD, VDDQ = 2.5V +/- 5% All inputs and outputs are compatible with SSTL_2 interface JEDEC standard 400mil 66pin TSOP-II with 0.65mm pin pitch Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS) x16 device has 2 bytewide data strobes (LDQS, UDQS) per each x8 I/O Data outputs on DQS edges when read (edged DQ) Dat.

Datasheet Details

Part number	HY5DU281622AT-6
Manufacturer	Hynix Semiconductor
File Size	269.38 KB
Description	128M(8Mx16) DDR SDRAM
Datasheet	HY5DU281622AT-6 Datasheet
Additional preview pages of the HY5DU281622AT-6 datasheet.

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Full PDF Text Transcription

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HY5DU281622AT-6 128M(8Mx16) DDR SDRAM HY5DU281622AT This document is a general product description and is subject to change without notice. Hynix semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.3/May. 02 1 HY5DU281622AT-6 Revision History 1. Revision 0.2 (Dec. 01) 1) Separated ‘Function description’ and ‘Timing diagram’ parts - These are available in Web site (www.hynix.com) 2. Revision 0.3 (May. 02) 1) Input leakage current changed from +/-5uA to +/-2uA Rev. 0.3/May. 02 2 HY5DU281622AT-6 DESCRIPTION The Hynix HY5DU281622 is a 134,217,728-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the point-to-point applications which requires high bandwidth.

Published: Aug 4, 2014 |