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ICSSSTU32864 Datasheet - ICS

25-Bit Configurable Registered Buffer

ICSSSTU32864 Features

* 25-bit 1:1 or 14-bit 1:2 configurable registered buffer

* Supports SSTL_18 JEDEC specification on data inputs and outputs

* Supports LVCMOS switching levels on CSR# and RESET# inputs

* Low voltage operation VDD = 1.7V to 1.9V

* Available in 96 BGA package

ICSSSTU32864 General Description

1:2 Register B (C0 = 1, C1 = 1) This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VDD operation. All clock and data inputs are compatible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS. All outputs are 1.8-V CMOS drivers that have been .

ICSSSTU32864 Datasheet (140.58 KB)

Preview of ICSSSTU32864 PDF

Datasheet Details

Part number:

ICSSSTU32864

Manufacturer:

ICS

File Size:

140.58 KB

Description:

25-bit configurable registered buffer.
www.DataSheet4U.com Integrated Circuit Systems, Inc. ICSSSTU32864 25-Bit Configurable Registered Buffer Recommended Application: DDR2 Mem.

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ICSSSTU32864 25-Bit Configurable Registered Buffer ICS

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