MTB36N06E Datasheet | Motorola Semiconductor

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTB36N06E/D ™ Data Sheet TMOS E-FET.™ High Energy Power FET D2PAK for Surface Mount Designer's Motorola Preferred Device N- Channel Enhancement- Mode Silicon Gate The D2PAK package has the capability of housing a larger die than any existing surface mount package which allows it to be used in applications that require the use of surface mount ponents with higher power and lower RDS(on) capabilities. This advanced TMOS E- FET is designed to withstand high energy in the avalanche and mutation modes. The new energy efficient design also offers a drain- to- source diode with a fast recovery time. Designed for low voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and mutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. TMOS POWER FET 36 AMPERES 60 VOLTS RDS(on) = 0.04 OHM ® - Avalanche Energy Specified G - Source- to- Drain Diode Recovery Time parable to a Discrete Fast Recovery Diode - Diode is Characterized for Use in Bridge Circuits - IDSS and VDS(on) Specified at Elevated Temperature - Short Heatsink Tab Manufactured - Not Sheared - Specially Designed Leadframe for Maximum Power Dissipation - Available in 24 mm 13- inch/800 Unit Tape & Reel, Add T4 Suffix to Part Number MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Drain- to- Source Voltage Drain- to- Gate Voltage (RGS = 1.0 MΩ) Gate- to- Source Voltage - Continuous Drain Current - Continuous Drain Current - Continuous @ 100°C Drain Current - Single Pulse (tp ≤ 10 µs) CASE 418B- 02, Style 2 D2PAK S Symbol VDSS VDGR VGS ID ID IDM PD Value 60 60 ± 20 36 22 144 100 0.80 2.5 - 55 to 150 220 1.25 62.5 50 260 Unit Vdc Vdc Vdc Amps Apk Watts W/°C Watts °C m J °C/W Total Power Dissipation Derate above 25°C Total Power Dissipation @ TA = 25°C, when...