2.5v phase locked loop clock driver.
* PLL clock driver for DDR (Double Data Rate) synchronous DRAM applications
* Spread spectrum clock compatible
* Operating frequency: 60MHz to 220MHz
* L.
* Spread spectrum clock compatible
* Operating frequency: 60MHz to 220MHz
* Low jitter (cycle-to-cycle): ±50.
The CSPT855 is a high-performance, low-skew, low-jitter zero delay buffer that distributes one differential clock input pair(CLK, CLK ) to four differential output pairs (Y [0:3], Y [0:3]) and one differential pair of feedback clock outputs (FBOUT, .
Image gallery
TAGS
Manufacturer
Related datasheet
Download (Size : 228.88KB)