Datasheet Details
| Part number | uPD46185364B |
|---|---|
| Manufacturer | Renesas |
| File Size | 567.19 KB |
| Description | 18M-BIT QDR II SRAM 4-WORD BURST OPERATION |
| Download | uPD46185364B Download (PDF) |
|
|
Download the uPD46185364B datasheet PDF. This datasheet also includes the uPD46185084B variant, as both parts are published together in a single manufacturer document.
| Part number | uPD46185364B |
|---|---|
| Manufacturer | Renesas |
| File Size | 567.19 KB |
| Description | 18M-BIT QDR II SRAM 4-WORD BURST OPERATION |
| Download | uPD46185364B Download (PDF) |
|
|
|
R10DS0113EJ0200 Rev.2.00 Nov 09, 2012 The μPD46185084B is a 2,097,152-word by 8-bit, the μPD46185094B is a 2,097,152-word by 9-bit, the μPD46185184B is a 1,048,576-word by 18-bit and the μPD46185364B is a 524,288-word by 36-bit synchronous quad data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell.
The μPD46185084B, μPD46185094B, μPD46185184B and μPD46185364B integrate unique synchronous peripheral circuitry and a burst counter.
All input registers controlled by an input clock pair (K and K#) are latched on the positive edge of K and K#.
μPD46185084B μPD46185094B μPD46185184B μPD46185364B Datasheet 18M-BIT QDRTM II SRAM 4-WORD BURST.
| Part Number | Description |
|---|---|
| uPD46185362B | 18M-BIT QDR II SRAM 2-WORD BURST OPERATION |
| uPD46185084B | 18M-BIT QDR II SRAM 4-WORD BURST OPERATION |
| uPD46185092B | 18M-BIT QDR II SRAM 2-WORD BURST OPERATION |
| uPD46185094B | 18M-BIT QDR II SRAM 4-WORD BURST OPERATION |
| uPD46185182B | 18M-BIT QDR II SRAM 2-WORD BURST OPERATION |
| uPD46185184B | 18M-BIT QDR II SRAM 4-WORD BURST OPERATION |
| uPD46184095B | 18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION |
| uPD46184182B | 18M-BIT DDR II SRAM 2-WORD BURST OPERATION |
| uPD46184184B | 18M-BIT DDR II SRAM 4-WORD BURST OPERATION |
| uPD46184185B | 18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION |