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TC55NEM216AFTN55 - (TC55NEM216AFTN55 / TC55NEM216AFTN77) MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

Description

The TC55NEM216AFTN is a 4,194,304-bit static random access memory (SRAM) organized as 262,144 words by 16 bits.

Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 5V ± 10% power supply.

Features

  • Low-power dissipation Operating: 15 mW/MHz (typical) Single power supply voltage of 5 V ± 10% Power down features using CE Data retention supply voltage of 2.0 to 5.5 V Direct TTL compatibility for all inputs and outputs Wide operating temperature range of.
  • 40° to 85°C Standby Current (maximum): 20 µA.
  • Access Times (maximum): TC55NEM216AFTN 55 Access Time CE Access Time OE Access Time 70 70 ns 70 ns 35 ns 55.

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Datasheet Details

Part number TC55NEM216AFTN55
Manufacturer Toshiba
File Size 219.68 KB
Description (TC55NEM216AFTN55 / TC55NEM216AFTN77) MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
Datasheet download datasheet TC55NEM216AFTN55 Datasheet

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Full PDF Text Transcription

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TC55NEM216AFTN55,70 www.DataSheet4U.com TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 262,144-WORD BY 16-BIT FULL CMOS STATIC RAM DESCRIPTION The TC55NEM216AFTN is a 4,194,304-bit static random access memory (SRAM) organized as 262,144 words by 16 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 5V ± 10% power supply. Advanced circuit technology provides both high speed and low power at an operating current of 3 mA/MHz (typ) and a minimum cycle time of 55 ns. It is automatically placed in low-power mode at 1 µA standby current (typ) when chip enable ( CE ) is asserted high. There are two control inputs.
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