ZL30110 Datasheet - Zarlink Semiconductor

Telecom Rate Conversion DPLL

ZL30110 Features

* Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 16.384 MHz

* Provides a range of output clocks:

* 65.536 MHz TDM clock locked to the input reference

* General purpose 25 MHz fan-out to 6 outputs locked to the external crystal or oscillator

* General purpose 1

ZL30110 General Description

The ZL30110 clock rate conversion digital phaselocked loop (DPLL) provides accurate and reliable frequency conversion. The ZL30110 generates a range of clocks that are either locked to the input reference or locked to the external crystal or oscillator. In the locked mode, the reference input is con.

ZL30110 Datasheet (320.76 KB)

ZL30110 Datasheet Preview — Preview of ZL30110 PDF

Datasheet Details

Part number:

ZL30110

Manufacturer:

Zarlink Semiconductor

File Size:

320.76 KB

Description:

Telecom rate conversion dpll.

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ZL30110 Telecom Rate Conversion DPLL Zarlink Semiconductor

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ZL30110 Features

ZL30110 General Description

Datasheet Details

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