ZL30101 Datasheet - Zarlink Semiconductor Inc

ZL30101 T1/E1 Stratum 3 System Synchronizer

The ZL30101 Stratum 3 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization for multi-trunk T1 and E1 transmission equipment. The ZL30101 generates ST-BUS and other TDM clock and framing signals that are phase locked to one of two input references.

ZL30101 Features

* April 2010

* Supports Telcordia GR-1244-CORE Stratum 3

* Supports G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces

* Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces

* Simple hardware control interface

* Accepts two input

ZL30101_ZarlinkSemiconductorInc.pdf