ZL30108 Datasheet - Zarlink Semiconductor

ZL30108 SONET/SDH Network Interface DPLL

The ZL30108 SONET/SDH network interface digital phase-locked loop (DPLL) provides timing and synchronization for SONET/SDH network interface cards. The ZL30108 generates a SONET/SDH clock and framing signals that are phase locked to one of two backplane or network references. It helps ensure system .

ZL30108 Features

* Supports output wander and jitter generation specifications for GR-253-CORE OC-3 and G.813 STM-1 SONET/SDH interfaces

* Accepts two input references and synchronizes to any combination of 2 kHz, 8 kHz, 1.544 MHz, 2.048 MHz, 8.192 MHz, 16.384 MHz or 19.44 MHz inputs

* Provid

ZL30108_ZarlinkSemiconductor.pdf