ZL30109 Datasheet - Zarlink Semiconductor

ZL30109 DS1/E1 System Synchronizer

The ZL30109 DS1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization for multi-trunk DS1 and E1 transmission equipment. The 19.44 MHz output makes the ZL30109 also suitable for SDH line card applications. The ZL30109 generates a 19.44 MHz cloc.

ZL30109 Features

* April 2010

* Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E

* Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces

* Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces Ordering Information ZL30109QDG1 64 pin TQFP

ZL30109 Datasheet (452.49 KB)