ZL30409 Datasheet - Zarlink Semiconductor Inc

ZL30409, T1/E1 System Synchronizer with Stratum 3 Holdover

ZL30409 T1/E1 System Synchronizer with Stratum 3 Holdover Data Sheet .
The ZL30409 T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1.

Features

* Supports Telcordia GR-1244-CORE Stratum 4 timing for DS1 interfaces Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces Selectable 19.44 MHz, 2.048MHz, 1.544MHz or 8kHz input reference signals Provides C1.5, C2, C4, C6, C8, C16, and C1

Applications

* Synchronization and timing control for multitrunk T1,E1 and STS-3/OC3 systems ST-BUS clock and frame pulse sources

ZL30409_ZarlinkSemiconductorInc.pdf