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ZL30416 SONET/SDH Clock Multiplier PLL

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Description

www.DataSheet4U.com ZL30416 SONET/SDH Clock Multiplier PLL Data Sheet .
The ZL30416 is an Analog Phase-Locked Loop (APLL) designed to provide jitter attenuation and rate conversion for SDH (Synchronous Digital Hierarchy) a.

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Datasheet Specifications

Part number
ZL30416
Manufacturer
Zarlink Semiconductor
File Size
367.44 KB
Datasheet
ZL30416_ZarlinkSemiconductor.pdf
Description
SONET/SDH Clock Multiplier PLL

Applications

* as defined in Telcordia GR-253-CORE Low jitter clock outputs suitable for STM-64, STM16, STM-4 and STM-1 applications as defined in ITU-T G.813 Provides one differential LVPECL output clock selectable to 19.44, 38.88, 77.76, 155.52 or 622.08 MHz Provides a single-ended CMOS output clock at 19.44 MHz

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