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ZL30414 SONET/SDH Clock Multiplier PLL

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Description

www.DataSheet4U.com ZL30414 SONET/SDH Clock Multiplier PLL Data Sheet .
The ZL30414 is an analog phase-locked loop (APLL) designed to provide jitter attenuation and rate conversion for SDH (Synchronous Digital Hierarchy) a.

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Datasheet Specifications

Part number
ZL30414
Manufacturer
Zarlink Semiconductor
File Size
434.51 KB
Datasheet
ZL30414_ZarlinkSemiconductor.pdf
Description
SONET/SDH Clock Multiplier PLL

Features

* Meets jitter requirements of Telcordia GR-253CORE for OC-192, OC-48, OC-12, and OC-3 rates Meets jitter requirements of ITU-T G.813 for STM64, STM-16, STM-4 and STM-1 rates Provides four LVPECL differential output clocks at 622.08 MHz Provides a CML differential clock at 155.52 MHz Provide

Applications

* SONET/SDH line cards Network Element timing cards LPF C622oEN-A C622oEN-B C622oEN-C C622oEN-D C622oP/N-A C19i Frequency & Phase Detector Loop Filter VCO Frequency Dividers and Clock Drivers C622oP/N-B C622oP/N-C C622oP/N-D C155oP/N C19o 19.44MHz State Machine Reference and Bi

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