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ADP7102 CMOS LDO

ADP7102 Description

Data Sheet 20 V, 300 mA, Low Noise, CMOS LDO ADP7102 .
The ADP7102 is a CMOS, low dropout linear regulator that operates from 3.

ADP7102 Features

* Input voltage range: 3.3 V to 20 V Maximum output current: 300 mA Low noise: 15 μV rms for fixed output versions PSRR performance of 60 dB at 10 kHz, VOUT = 3.3 V Reverse current protection Low dropout voltage: 200 mV at 300 mA load Initial accuracy: ±0.8% Accuracy over line, load, and temperature:

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CMOS LDO Analog Devices
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