ADP7112 Datasheet - Analog Devices

CMOS LDO Linear Regulator

ADP7112 Features

* Low noise: 11 μV rms independent of fixed output voltage PSRR of 88 dB at 10 kHz, 68 dB at 100 kHz, 50 dB at 1 MHz, VOUT = 5 V, VIN = 7 V Input voltage range: 2.7 V to 20 V Maximum output current: 200 mA Initial accuracy: ±0.8% Accuracy over line, load, and temperature ±1.8%, TJ =

* 40°C to +

ADP7112 General Description

The ADP7112 is a CMOS, low dropout (LDO) linear regulator that operates from 2.7 V to 20 V and provides up to 200 mA of output current. This high input voltage LDO is ideal for the regulation of high performance analog and mixed-signal circuits operating from 19 V down to 1.2 V rails. Using an advan.

ADP7112 Datasheet (577.34 KB)