Datasheet4U Logo Datasheet4U.com

CY7C1310BV18

1.8V Synchronous Pipelined SRAM

CY7C1310BV18 Features

* Separate independent read and write data ports

* Supports concurrent transactions

* 250 MHz clock for high bandwidth

* 2-word burst on all accesses

* Double Data Rate (DDR) interfaces on both read and write ports (data transferred at 500 MHz) at 250 MHz

* Two input clocks

CY7C1310BV18 Datasheet (390.16 KB)

Preview of CY7C1310BV18 PDF

Datasheet Details

Part number:

CY7C1310BV18

Manufacturer:

Cypress Semiconductor

File Size:

390.16 KB

Description:

1.8v synchronous pipelined sram.

📁 Related Datasheet

CY7C131 1K x 8 Dual-Port Static RAM (Cypress Semiconductor)

CY7C1311AV18 (CY7C131xAV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture (Cypress Semiconductor)

CY7C1311BV18 (CY7C1x1xBV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture (Cypress Semiconductor)

CY7C1311CV18 (CY7C1x1xCV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture (Cypress Semiconductor)

CY7C1311JV18 (CY7C1x1xJV18) 18-Mbit QDR II SRAM 4-Word Burst Architecture (Cypress Semiconductor)

CY7C1311KV18 18-Mbit QDR II SRAM Four-Word Burst Architecture (Cypress Semiconductor)

CY7C1312BV18 1.8V Synchronous Pipelined SRAM (Cypress Semiconductor)

CY7C1312KV18 18-Mbit QDR II SRAM Two-Word Burst Architecture (Cypress Semiconductor)

CY7C1313AV18 (CY7C131xAV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture (Cypress Semiconductor)

CY7C1313BV18 (CY7C1x1xBV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture (Cypress Semiconductor)

TAGS

CY7C1310BV18 1.8V Synchronous Pipelined SRAM Cypress Semiconductor

Image Gallery

CY7C1310BV18 Datasheet Preview Page 2 CY7C1310BV18 Datasheet Preview Page 3

CY7C1310BV18 Distributor