Datasheet4U Logo Datasheet4U.com

CY7C1311AV18 - (CY7C131xAV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture

CY7C1311AV18 Description

PRELIMINARY CY7C1311AV18 CY7C1313AV18 CY7C1315AV18 18-Mb QDR™-II SRAM 4-Word Burst Architecture .
The CY7C1311AV18/CY7C1313AV18/CY7C1315AV18 are 1.

CY7C1311AV18 Features

* Separate Independent Read and Write Data Ports
* Supports concurrent transactions
* 250-MHz Clock for High Bandwidth
* 4-Word Burst for reducing address bus frequency
* Double Data Rate (DDR) interfaces on both Read and Write Ports (data transferred at 500 M

📥 Download Datasheet

Preview of CY7C1311AV18 PDF
datasheet Preview Page 2 datasheet Preview Page 3

Datasheet Details

Part number
CY7C1311AV18
Manufacturer
Cypress Semiconductor
File Size
356.67 KB
Datasheet
CY7C1311AV18_CypressSemiconductor.pdf
Description
(CY7C131xAV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture

📁 Related Datasheet

  • CY7C131AE - 1K/2K x 8 Dual-Port Static RAM (Cypress)
  • CY7C131E - 1K/2K x 8 Dual-Port Static RAM (Cypress)
  • CY7C136AE - 1K/2K x 8 Dual-Port Static RAM (Cypress)
  • CY7C136E - 1K/2K x 8 Dual-Port Static RAM (Cypress)
  • CY7C1370C - 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture (Cypress)
  • CY7C1370CV25 - 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture (Cypress)
  • CY7C1370D - 18-Mbit (512 K 횞 36/1 M 횞 18) Pipelined SRAM (Cypress)
  • CY7C1371C - 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture (Cypress)

📌 All Tags

CY7C131xAV18 18-Mb QDRTM-II SRAM 4-Word Burst Architecture Cypress Semiconductor
Cypress Semiconductor CY7C1311AV18-like datasheet